A new floorplan simultaneously placing blocks over two logic layers for sea-of-gate gate arrays

A new floorplan simultaneously placing blocks defined over two layers is proposed. The objective function considers the interblock wiring length and the area of blocks over two layers. A method for automatic determination of the coefficient between the above two terms is proposed. Experimental results show that the average wiring length inside blocks and the execution time of the proposed floorplan are better than those of a flat-layout and a layer-by-layer floorplan.<>