Automatic synthesis and the cost of testing

Retiming has been postulated as an optimization technique which increases performance at the expense of area. This paper shows that a relationship exists between performance and testability. Designers must be aware of this relationship as the blind use of synthesis tools may yield unexpected and dramatic results. This paper demonstrates that retiming can increase the test generation time required to attain a given fault efficiency by more than two orders of magnitude, and cause a considerable decrease in the fault coverage which is attained.<>