Memory package with LOC structure using new adhesive material

The LOC (Lead On Chip) structure has been considered as an effective technology to encapsulate a large LSI memory chip into a small package. The main feature of the structure is contact of leadframes onto the active chip area with adhesive sandwiched in between. Therefore, the design concept of LOC greatly depends on the characteristics of the adhesive layer. The key technologies for LOC development are summarized as: 1. To lessen damage on chip during die-attach and wire bonding; 2. To secure sufficient wire bendability above the organic adhesive; and 3. To reduce package crack rate during the solder reflowing process. We have developed a new adhesive tape which is composed of single-layer thermoplastic polyimide siloxanes. Due to the absence of a base film, the single layer adhesive can be fabricated to any desirable thickness. During its softening process, the thick adhesive film encloses dust that, otherwise, could damage the chip surface. These properties, by providing a large Young's modulus of the film at high temperature and contamination-free lead surface, enable us to secure sufficient lead-wire bendability. The other materialistic advantage of the adhesive is its low moisture absorption. The low moisture absorption results in high resistance against package crack caused by the solder reflowing process. In this paper, we describe how we have selected the LOC adhesive tape through the evaluations of the assembly process and have successfully developed a highly productive and reliable memory package with LOC structure.<>