A low-permittivity interconnection using an SiBN interlayer

A low-permittivity two-level interconnection process is presented. The key features of this process are the use of a low dielectric constant SiBN interlayer and the adoption of planarization using a two-stage etch-back process. The SiBN film is characterized from the standpoint of its device applications. The two-level interconnection process flow is described in detail. The effect of the SiBN interlayer in reducing the second wiring capacitance is compared to that of a conventional silicon nitride interlayer. This is demonstrated by fabricating a 33-stage ECL ring oscillator and a 2.1 kG macrocell array LSI.<>