Effect of plasma-induced charging damage on n-channel and p-channel MOSFET hot carrier reliability

We have investigated the impact of plasma-induced charging damage on the hot carrier reliability of n- and p-MOSFET's, including the examination of different stress bias regimes and the statistical distributions of hot carrier failure times. We found that when electron trapping determines hot carrier failure-as in p-MOSFETs stressed under the peak gate current condition-the median time-to-fail was dramatically reduced while the dispersion in the failure data was increased as plasma damage increased. Interface trap dominated hot carrier degradation-as in n-MOSFET's stressed under the peak substrate current condition or p-MOSFET's stressed at V/sub gs/=V/sub ds/-was not affected by plasma damage. Then both electron trapping and interface trap generation impact hot carrier degradation-as in n-MOSFET's stressed at V/sub gs/=V/sub ds/-plasma damage had a measurable but smaller effect on the failure statistics. These results are explained in terms of the differing impact of thermal annealing on bulk and interface traps. Finally, we show that reduced damage processes can mitigate the impact of plasma damage on MOSFET hot carrier robustness.<
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