FASTBUS Standard Routines implementation for Fermilab embedded processor boards

In collaboration with CEBAF, Fermilab's Online Support Department and the CDF experiment have produced a new implementation of the IEEE FASTBUS Standard Routines for two embedded processor FASTBUS boards: the Fermilab Smart Crate Controller (FSCC) and the FASTBUS Readout Controller (FRC). Features of this implementation include portability to other embedded processor boards, remote source-level debugging, high speed, optional generation of very-high-speed code for readout applications, and built-in Sun RPC support for execution of FASTBUS transactions and lists over the network.<>