Impact of behavioral modifications for testability

Behavioral specification of a VLSI design can be used to suggest behavioral modifications that improve testability of the design. Past work has been targeted at identifying the techniques that will enable such modifications. However, the impact of such behavioral modifications on the testability of a design has not been analyzed with regards to fault coverage and area overhead which is the focus of this paper. Results obtained show that the area overhead is low and the fault coverage is higher when the behavior is modified for testability. These results are compared with the results obtained when partial scan is used to improve the testability of a design.<
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