Multiplier design using RBSD number system

A high-speed multiplier is designed based on recoded modified-signed digit binary number system. In the redundant binary representation each digit is represented by either 0, 1, or -1, which can be recoded into a new form, whose addition is free from carry propagation. In the recoded number, there are no two consecutive 1's or -1's, as a result, it eliminates the propagation of carry. Carry free adders based on recoded number are the basic building blocks of high-speed multiplier, which leads to a regular cellular array structure suitable for VLSI implementation. The multiplier consists of partial product generator followed by the encoder which converts binary numbers to recoded binary signed-digit (RBSD). These RBSD partial products are then added by recoded carry free adder.<>