Error-speed compromise for FFT VLSI

The Fourier transform is very used for its properties and because the fast fourier Transform (FFT) algorithm has allowed speeding up computations. Each step of it introduces an error caused first by the quantization of the sine and cosine coefficients, second by the necessarily limited size-increase of the results. The roundoff-phenomenon has much more important effects than the coefficient-imprecision. The arithmetic unit can treat numbers either sufficiently large to maximize the accuracy or smaller to minimize the area, in the case of parallel operators, or the computation time, in the case of serial operators. Using the properties of the serial operators, the authors propose a way to approach the first without going too far from the second and propose an architecture to implement it in VLSI.<>