Challenges of MOS analog circuit simulation with SPICE

Describes SPICE MOSFET implementation details, known model imperfections and MOS circuit techniques that contribute to simulation convergence failure of CMOS analog circuits. Discontinuities in the MOS Level 2 and 3 drain-source conductance and gate-drain transconductance and the relation to model parameters are highlighted. convergence difficulties are exemplified by the simulation of CMOS differential amplifier with active cascode loads. Solutions for convergence are described based on model-parameter/physical-effect selection, options specification, initialization techniques and algorithmic choices.<>