Modeling frequency dependence of GaAs MESFET characteristics

We present a new method of modeling the output conductance dispersion of GaAs MESFET's. High frequency model parameters are extracted and then used to model high frequency output conductance over a wide range of bias conditions. The model is then used to simulate and analyze the effect of output conductance dispersion on the performance of DCFL and SCFL logic gates. Whereas the DCFL performance is not significantly affected by the high frequency effects, the noise margin of SCFL decreases by almost a factor of 30% above 100 kHz, with an associated decrease in the voltage swing and gate delay.<>