Strategies for mapping Lee's maze routing algorithm onto parallel architectures

Lee's (1961) maze-routing algorithm has been a popular method for routing wires in VLSI circuits. It can also be applied to a variety of other problems, such as robot path planning. Although the algorithm is simple and easy to implement, its computation time can be quite high. Therefore, it is a very attractive candidate for implementation on parallel systems. The major issue in parallelizing this algorithm is mapping the grid space of the problem to the processor space. The communication cost and processor utilization can be greatly affected by the mapping strategy used. Won and Sahni (1987) have studied a class of mapping strategies for Lee's algorithm and analyzed their performance. The authors propose two new mapping strategies. First, they modify Won and Sahni's mapping algorithm by using the concept of mirror images to allow higher processor utilization while reducing the number of boundary cells. The new algorithm is shown to be better than the original one in an obstacle-free grid space. Then, they propose a dynamic mapping algorithm. This new mapping algorithm is shown to give an optimal mapping in an obstacle-free grid space. Also, they performed simulation to study the relative performance of these mapping algorithms for grid spaces with obstacles. The results show that the new algorithms are substantially faster than the earlier ones.<>