A full experience of designing a wafer scale 2D array

The design of a wafer scale 2D array called ELSA (European large single instruction, multiple data (SIMD) array) is given. Software methods and tools as well as hardware switching devices used to achieve defect tolerance and create a defect-free 2D array are described. ELSA is implemented in 1.2- mu m CMOS technology and has been studied within an ESPRIT project on wafer scale integration.<>