Flexible silicon compilation of charge redistribution data conversion systems

A system for the automatic synthesis of analog-digital (A/D) and digital-analog (D/A) converters employing binary weighted capacitor arrays is presented. By incorporating different circuit topologies as well as a powerful self-calibration technique, this system is capable of synthesizing conversion architectures to meet a broad range of resolution and performance requirements. It is formed by MDAC, a menu-driven architecture compiler, and ALSAC, a layout compiler including analog constraints.<>