Method of internal overvoltage protection and current limit for a lateral PNP transistor formed by polysilicon self-aligned emitter and base, with extended collector

An internal overvoltage protection and current limiting function has been integrated into a self-aligned lateral PNP output device of a high-voltage BiCMOS process. The PNP is formed utilizing existing diffusions. Self-protection is achieved by integrating a JFET junction field effect transistor mechanism into the lateral PNP which interrupts base current at a predetermined collector-base voltage. The P field diffusion forms the extended collector, which acts as the gate of a JFET. The channel of the JFET, which is formed in the N-epitaxial layer, electrically connects the intrinsic base to the external base contact. This internal protection mechanism eliminates the need for external devices which provide the same function, but would add cost and unnecessary power dissipation. Devices which electrically exhibited the internal protection mechanism were simulated and fabricated.<>