A behavioral approach to testability of neural networks

When dedicated VLSI devices implementing application-specific neural networks are considered, the problem of testability evaluation and test pattern generation has to be solved. The authors analyze the abstract behavioral model of a class of neural networks (namely, feed-forward, multi-layered ones) with the aim of defining a general frame for testability evaluation and test pattern definition. Given such general results, for any given implementation it is sufficient to identify mapping between the behavioral error model and the physical fault model in order to evaluate the actual fault coverage that can be achieved and to identify a strategy for test pattern generation. When a particular silicon implementation is envisioned it is sufficient to map the actual physical faults onto the abstract error model in order to mathematically derive the testability conditions for the specific circuit.<>