Resistance calculation from geometric layout data by boundary element method

In this paper, methods for calculating the resistance in integrated circuits (IC) are analysed and researched. It is discovered that traditional methods for resistance calculation suffer from unfavourable features, which make them uncomfortable to use. In this paper, an efficient method for calculating the resistance in integrated circuits by the boundary element method (BEM) is developed. With a detailed strict proof, the model for calculating the resistance in integrated circuits is set up. Actual resistances are calculated, and the computation results correspond basically to the test values. The correctness of resistance calculation by BEM is verified.<>