A waveform relaxation method applicable to bipolar digital circuits

The authors describe a method of implementing waveform relaxation for bipolar digital circuits. The key is to partition not only a given bipolar circuit into subcircuits but also the whole simulation time-interval into subintervals (windows), dynamically according to changes in operation status of specified bipolar transistors, so that in a given window every subcircuit can be simulated in parallel by means of the waveform relaxation. A number of implementation results are also shown to reveal how this waveform relaxation approach is useful in practice for bipolar digital circuits.<>