A low-power DC-DC converter with digital spread spectrum for reduced EMI

This paper presents a 1.8 V step-down DC-DC converter prototype with a hybrid delay-line based digital pulse-width modulator. A spread spectrum clock generation scheme is demonstrated for reducing EMI. The switching frequency of the buck converter prototype is automatically varied from 1.74 MHz to 2.84 MHz in 128 steps using a pseudo-random 512 cycle pattern, resulting in a 23 dB reduction in the conducted EMI peak. The digital pseudo-random pattern is converted to an analog reference voltage using a low-cost one-bit delta-sigma DAC having an over-sampling rate of 4096. The DAC output modulates the reference voltage of an LDO that regulates the delay-line supply voltage. It is shown that the effective duty-cycle changes by only 0.27 % over the frequency range. With spread spectrum mode enabled, the inductor current ripple becomes time-dependent but the efficiency degrades by less than 0.1%. The proposed architecture can be applied to a wide variety of state-of-the-art digital controllers that rely on delay-line based pulse width modulators.