NiSi Schottky Barrier Process-Strained Si (SB-PSS) CMOS Technology for High Performance Applications

State-of-the-art process-strained Si (PSS) technology featuring single-NiSi Schottky source/drain (S/D) and ultra-thin gate oxide of 1.2 nm is demonstrated for L
_gate
down to 39 nm. +10% performance boost of Schottky-barrier (SB)-PSS NMOS, as compared to its non-Schottky counterpart, is demonstrated due to series resistance reduction of the silicide S/D and enhanced strain effects. Highest SB-PSS PMOS drive current of 821 muA/mum (at V
_D
= -1.2V and I
_off
= 100 nA/mum) is recorded when integrated with recessed Si
_1-x
Ge
_x
S/D stressor