Analysis of dynamic element matching (DEM) in pipelined ADCs

Dynamic element matching (DEM), typically used to enhance the linearity of the digital-to-analog converter (DAC) in a multi-bit DeltaSigma modulator, can also be utilized to linearize the sub-DAC in a multi-bit pipeline stage of a pipelined analog-to-digital converter (ADC). In this paper, an analytical approach to estimate the effect of DEM on the spurious-free dynamic range (SFDR) of a pipelined ADC is presented. A closed-form expression for the 3rd-harmonic power and, hence, the SFDR of a pipelined ADC is derived. The proposed analysis shows that performing DEM in the first stage of a pipelined ADC reduces the 3rd-harmonic power in the ADC output spectrum by a factor of (2^m-1), where m is the number of effective bits in the first pipeline stage. Behavioral Monte-Carlo simulations are presented to demonstrate the accuracy of the proposed analysis