Slew rate induced distortion in switched-resistor integrators

Opamp-RC integrators built with linear resistors and capacitors can achieve very high linearity. By means of a switched resistor, tuning of the RC time-constant is possible via the duty-cycle of the clock controlling the switched resistor. This paper analyzes the effect of opamp slew rate limitations on the distortion of a switched-resistor lossy opamp-RC integrator. We show via analysis and simulations that the use of two sets of switched resistors instead of one relaxes the opamp slew rate requirements, and reduces the resulting distortion significantly.