Optimal shielding insertion for inductive noise avoidance

In this paper, given a set of parallel wires between a pair of adjacent P/G lines, according to the definition and computation of the inductive noise and the classification of violation wires, an O(n) optimal approach is proposed to insert shields into these parallel wires for the avoidance of inductive noise, where n is the number of a set of given parallel wires. The experimental results show that our proposed approach can use less CPU time to minimize the number of inserted shields for the avoidance of inductive noise.