A low-voltage CMOS linear transconductor suitable for analog multiplier application | IEEE Conference Publication | IEEE Xplore

A low-voltage CMOS linear transconductor suitable for analog multiplier application


Abstract:

Based on a previously reported low voltage class-AB CMOS linear transconductor, we propose a simple technique to modify such a circuit so that its transconductance gain i...Show More

Abstract:

Based on a previously reported low voltage class-AB CMOS linear transconductor, we propose a simple technique to modify such a circuit so that its transconductance gain is linearly dependent on external voltage. The applicability of the resulting transconductor in low voltage low power four quadrant analog multiplication is then presented. PSPICE simulation results of both the proposed transconductor and multiplier are given
Date of Conference: 21-24 May 2006
Date Added to IEEE Xplore: 11 September 2006
Print ISBN:0-7803-9389-9

ISSN Information:

Conference Location: Kos, Greece

References

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