Memory-based crosstalk canceling CODECs for on-chip buses

In recent times, the ratio of the cross-coupling capacitance between adjacent on-chip wires on the same metal layer to the total capacitance of any wire is becoming quite large. As a consequence, signal wires exhibit a significant delay variation and noise immunity problems. This problem is aggravated for long on-chip buses. In this paper, we develop memory-based crosstalk canceling CODECs for on-chip buses. We describe an reduced ordered binary decision diagram (ROBDD) based methodology to accurately compute the bus area overhead of the CODECs. We report the asymptotic overhead for CODECs which cancel three kinds of crosstalk patterns, and demonstrate that the bus size overheads are lower than the corresponding overheads for a memoryless CODEC. This results in a reduced overall area utilization for memory-based crosstalk canceling CODECs, compared to their memoryless counterparts. We also demonstrate that the use of these crosstalk canceling CODECs enables a user to speed up a bus by a factor of over 6/spl times/. Further, by using our techniques, a user may trade off the speed gain against the attendant bus size overhead.