Automated generation of custom pad cells for ASICs

A CMOS pad cell generator has been developed to create layouts of custom pads in any set of customer-provided design rules. This generator is intended primarily for customer-owned design. Customer-owned ASICs (application-specific integrated circuits) often suffer from reliability problems because of poor ESD (electrostatic discharge) and latchup protection on I/O structures. These layout and process sensitive issues are usually not optimized by the designers for the foundry's fabrication capabilities. Module generation effectively solves this problem by allowing the foundry to create design rule updatable pad cells tailored for its process so as to meet industry standards for input protection.<>