A new PSPICE sub-circuit for the power MOSFET featuring global temperature options

An empirical sub-circuit implemented in PSPICE is presented. It accurately portrays the vertical DMOS power MOSFET electrical and thermal responses. Excellent agreement is demonstrated between measured and modeled responses, including first and third quadrant MOSFET and gate charge behavior, body diode effects, breakdown voltage at high and low currents, gate equivalent series resistance, and package inductances for temperatures between -55 degrees C and 175 degrees C. Parameter extraction is relatively straightforward, as described.<>