A low-power FSK modulator/demodulator for an MICS band transceiver

This paper presents a low-power FSK (frequency shift keying) modulator/demodulator. It supports a data rate of 20 kb/s and uses a phase interpolating clock recovery circuit that forces the rising edge of the clock track the demodulated data precisely. In the transmitter side, the base-band data directly modulate a four stage differential ring VCO (voltage controlled oscillator) with an FSK tone frequency of 80 kHz fitting into one of ten 300-kHz channels allocated at the new 402-405 MHz MICS (medical implant communication services) band. The designs are implemented in a 0.18-/spl mu/m CMOS process. The all digital demodulator circuits consume only 33.41 /spl mu/A current from a 1.5-V supply.