Implementation of an Arm Compatible Processor Core for SOC Designs

Hardware description languages (HDLs) are commonly used to construct hardware systems. Reuse of the design is a common practice to improve the productivity nowadays. In this paper, an implementation of a fully pipelined ARM compatible processor core, which can be embedded into system-on-chips (SOCs) is presented. The implementation aims to support research, education, and development by opening the source codes. The logic description of the core is based on VHDL. Therefore, the core can be applied to design tools of many vendors and can be easily reused