Towards a scalable architecture for class-A power amplifiers

In this paper we present a preliminary study on a scalable class-A power amplifier (PA) architecture, which improves PA's efficiency by dynamically scaling biasing current as well as compensating the gain. Simulation results indicate the potential of 71% efficiency improvement, as well as 50% reduction of power consumption, with the input range near the -8 dBm level. We discuss simulation setups as well as results, and identify future research areas with the goal to have a complete and flexible architecture allowing dynamic current scaling for higher PA efficiency and other operation parameters.