The Fermilab D0 master clock system

The clock system provides bunch-crossing-related timing signals to various detector subsystems. Accelerator synchronization and monitoring as well as timing signal generation and distribution are discussed. The system was built using three module types implemented in Eurostandard hardware with a VME communications interface. The first two types of modules were used to facilitate synchronization with the accelerator and to generate 23 timing signals that were programmable with one RF bucket (18.8-ns) resolution and 1-ns accuracy. Fifty-four modules of the third type were used to distribute the timing signals and two synchronous 53-MHz and 106-MHz clocks to various detector subsystems.<>