A background compensation technique for sample time errors in time-interleaved A/D converters

Offset, gain, and sample-time mismatches among different channels of a time-interleaved analog-to-digital converter (ADC) are causes of significant degradation of performance. A digital background compensation technique for sample-time error in time-interleaved ADCs is proposed. This error estimation method does not use a calibration signal and is especially suitable for time-interleaved ADCs used in digital data communication systems. The error correction is performed by adjusting the delay of the clock path of each channel, using a digitally-controlled delay element. The compensation method is not sensitive to the offset mismatch among channels. However, the required gain matching among channels is provided by a gain mismatch compensation technique that is also proposed in this paper. The simulation results verify that the proposed compensation techniques estimate and correct the gain mismatch and timing error with a high degree of accuracy