Back-gate controlled READ SRAM with improved stability

We have presented a novel back-gate controlled UTSOI SRAM cell structure and associated design considerations. The proposed scheme offers improved stability compared with conventional 6T cell, and has less number of transistors than the conventional 10T cell. Due to over 3/spl times/ improvement in SNM even at low VDD and reduced area penalty compared with 10T cell, the proposed 8T cell could be aggressively scaled down. This scheme can also be applied to SRAM cells with asymmetrical DG devices.