Design and development of PCM decommutator with PCI-interface

PCM decommutator is the important subsystem at the ground station in telemetry. The existing system of decommutator is designed using discrete components for each function of decommutation, hence there is a need to design decommutator using VHDL to make it compact by implementing it in FPGA. A PCM decommutator is designed with PCI interface using VHDL. The hardware design consists of three major modules a) decommutator b) FIFO and c) PCI interface management module. Decommutator is designed to decode the individual parameters from the incoming serial PCM stream. FIFO is developed to store the decommutated data temporarily before sending it to PC. The PCI interface management module is to enable the communication between the FPGA and PCI 9054 thereby to PCI bus. A software program is written in VC to read the data from FPGA and storing it on a PC hard disc. PCI interface management is tested and verified. The decommutator with FIFO is validated using simulator.