A NOI-nanotransistor

The SOI technologies become attractive in the nanodevices domain. The study is starting from a SOI nanotransistor with prominent Si-n source and drain regions and thinner p-type layer. The p-film was thinned from 10 nm up to 0.3 nm. This paper presents the last stage: the p-film is completely eliminated. Hence a nothing on insulator configuration results. Essentially, a new nanotransistor, with a vacuum cavity on insulator, placed between two SOI regions representing the source and drain, was proposed.