Concepts for the restitution of video signals using MOS analog circuits

Two architectures of a video decoder using an analog 2- mu m CMOS process are examined. One includes digital oversampling filters, while the other one is based on switched-capacitor (SC) filters. The first architecture has been fabricated and led to a 38-mm/sup 2/ circuit including more than 40000 transistors. An estimation of the SC solution makes it possible to obtain a chip of about 10 mm/sup 2/ and less than 10000 transistors. The power consumption is nearly identical for both solutions.<>