DHT: diagonally hybridized tree is an efficient VLSI structure for parallel computation

A new tree-based VLSI architecture called a diagonally hybridized tree (DHT) is proposed. DHT requires less hardware in terms of number of processors, connecting links and layout area compared to a mesh-of-tree of comparable size. By mapping a number of representative problems on DHT, the suitability of DHT for parallel computation is demonstrated. The results show that DHT with a sequential host can be used as a general-purpose parallel computer. A scheme is also given to tolerate faults in DHT by using spare processing elements (PEs) and links. It is shown that, asymptotically, DHT can tolerate O(N) faults by using O(N) spare PEs and O(N) spare links.<
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