A weighted technique for programmable logic devices minimization

A technique for minimizing the width of programmable logic devices (PLDs) is introduced. The algorithm starts with the result of the technique introduced by Das, Banerji and Chatopadhyay (1973). The solution obtained is refined to form the temporary solution, or what is called a preliminary solution. The problem of the preliminary solution is that it does not guarantee a minimum solution, because it does not use redundant classes, that are sometimes essential to the final minimum solution. The weighting technique is introduced, which gives a weight to each micro-order. The micro-orders with the largest weights are stripped from each class to form a stripped set. The stripped micro-orders are tested for compatibility, and a new set of compatibility classes are formed based on the stripped micro-orders, and the reserved classes only. Some factors are taken into consideration before the stripped micro-orders become the final collection. The procedure loops again with the new set of compatibility classes as long as reduction is obtained.<>