Global optimization in complex circuits design

Today's circuit design process is become a complex task. Sequential logic synthesis is an important part of the circuit design flow. The logic synthesis phase is a bottleneck during the overall design process since heuristic techniques which take a considerable amount of time are often used during this phase. A good solution is realized in a constrained design space by using global optimization techniques. The purpose of this paper is to develop a robust optimization algorithm, that searches the solution space as efficiently as possible in order to find a global optimization of the internal states of a specified circuit, as a global solution to a high level synthesis problem.