Sleep transistor circuits for fine-grained power switch-off with short power-down times

Fine-grained sleep transistor circuits are demonstrated with 0.12μm 16 b MAC (multiply-accumulate unit). Standby power is reduced by a factor of 5500 at 85°C with speed reduction of 5%. Charge recycling reduces the minimum sleep time by 25%. Dynamic power dissipation decreases by 16% activating a fraction of the switch in slow mode. Double switching inhibits power-on glitches and reduces current spikes by 38%.