A high-speed 1-Mbit EPROM with a Ti-silicided gate

A high-speed and high-density 1-Mbit EPROM has been developed by utilizing a 1.0-µm minimum design rule and Ti-silicided gate technology. Selective Ti silicidation of the poly-Si gate has been successfully employed to reduce the word line resistance. The sheet resistance has been reduced to about 2 Ω/ without degrading the programming, erasing, and retention characteristics. Both Ti silicidation and device size reduction have been combined to achieve the fast access time of 100 ns.