Multilayer CMOS device fabricated on laser recrystallized silicon islands

Multilayer CMOS devices were fabricated by a laser recrystallization technology. The single crystalline silicon islands embedded in an insulator on the top of MOS IC were studied. To minimize the thermal influence on a lower IC during the fabrication process, a CVD-SiO
2
was used as a retaining wall of silicon islands instead of a LOCOS. In addition, a planarized heat sink (PHS) polysilicon layer was employed to eliminate the impediment to a grain growth at the steps due to a lower IC. The single crystalline silicon islands were successfully obtained. The field effect mobility of NMOS transistors fabricated on single-crystallied silicon islands was calculated as about 400 cm
²
/V.sec, 490cm
²
/V.sec. The 10 bit CMOS shift register fabricated just on a lower IC was successfully operated at V
DD
=6.5 V, f
CLK
= 1 MHz. The 4 bit CMOS shift register, stacking PMOS on NMOS was also successfully operated.