Resistanse modulation effect due to current injection and CMOS latch-up

Latch-up in both n-well and p-well CMOS inverters has been measured and quantitatively analyzed. It was found that the resistance of substrate and well are modulated by minority carrier injection from emitters of the parasitic bipolar transistors, and measured values of latch-up critical triggering current and holding current are two or three times larger than the simply expected values. The latch-up analysis including the modulation effects should give useful information for opimizing well or substrate structure and concentration.