Fully ion implanted planar GaAs E-JFET process

This paper describes the technology for fabrication of GaAs junction field effect transistor integrated circuits. 1 µm gate geometries are produced with Mg⁺ion implantation which was not possible with Zn diffusion due to lateral spreading. Threshold voltage is adjustable by varying the Mg⁺implant energy, and shows improved reproducibility. Ring oscillator circuits fabricated with implanted gates demonstrate the high speed and low power capability of this technology.