Double implanted V-MOS

An n-channel self-aligned doubly ion implanted lateral V-MOS structure (D-V-MOS) for high performance LSI IC application is described. The new structure is an improved D-MOS structure. The effective channel of the D-V-MOS is formed by the vertical difference in a n-type and a p-type impurity profile on a p^-substrate through a V-grooving technique. Thus, the threshold voltage and channel length of the D-V-MOS can be directly and more accurately controlled through ion implantation. In addition, super short channel lengths on the same order of magnitude as the base width of a bipolar transistor -- 0.1 um can be realized, resulting in a further improvement in frequency response. A depletion mode lateral V-MOS is used as load device for E/D operation. The fabrication process for the self-aligned self-isolated n-channel E/D D-V-MOS device is simple -- only 5 masking steps are required. The short channel effect associated with the D-V-MOS is discussed. It is found that for channel length less than 0.6um, the substrate sensitivity due to the source-to-substrate biase is significantly reduced even with a 1000 A gate.