An energy-efficient skew compensation technique for high-speed skew-sensitive signaling

Presented in this paper is an energy-efficient skew compensation technique referred to as the resistance-based distributed clock deskew (RDSK) technique. In comparison with the existing clock deskew techniques, the proposed RDSK technique achieves significant power reduction while maintaining effective in skew management. Furthermore, the proposed RDSK provides a better scalability for future technology scaling. Simulation results of an on-chip interconnect communication system with distributed receivers designed in a 0.10 /spl mu/m CMOS process demonstrate 20%-51% power reduction over the existing techniques. The proposed RDSK is an essential element of our adaptive timing framework where circuit performance can be adjusted adaptively in response to time-varying disturbances and uncertainties.