Optimized structure for fast data storage to non-volatile memory with minimum chip size

The requirement for high speed digital memory cards is increasing as the image quality keeps on growing. The chip area of the memory card controller is also an important issue. Three factors are discussed in this paper for designing a fast-speed, small-area card controller. These factors are physical address mapping, page moving elimination and minimum data buffer. Some suggestions and results are given in order to achieve the optimal structure.