A simple method for effective channel length, series resistance and mobility extraction in deep-submicron MOSFETs

A new method which utilizes the linear regression at subsections of the gate bias range is proposed for parameter extraction in deep-submicron lightly doped drain (LDD) MOSFETs. It avoids the range optimization and retains the accuracy of the linear regression extraction. The extracted gate bias dependent parameters are implemented in the proposed I-V model for LDD MOSFETs, resulting good agreements between simulations and measurements.