Using interleaved execution to resolve cyclic dependencies in time-based block diagrams

Time-based block diagrams are a convenient formalism for describing dynamic systems such as those found in control system design. The block-diagram model of the control system is used to capture implementation effects such as sample rates and fixed-point data types. One implementation decision concerns the desired software partitioning used in performing simulation and program synthesis. This paper shows how software partitioning may yield undesirable side-effects involving 'false' algebraic loops, which affects model execution and program synthesis. It presents an approach to resolve these pathological cases for a class of block diagram models.