A process invariant analog neural network IC with dynamically refreshed weights

An analog neural network IC whose operation is independent of process variation and gradients has been designed and built. RMS (root-mean-square) errors in the transfer function were observed to be under 2%. Additionally, an analog refresh scheme has been designed to maintain synapse weights without need for RAM. Measurements suggest that a minimum of 5 bit weight resolution is obtainable with the present design. Higher resolutions could be obtained with refinements to the synapse and refresher circuits.<>